Semiconductor devices (such as transistors) are used in computer memories and other related applications to maintain for a certain period of time a specified electrical state (i.e. a certain charge or voltage level) such as that representing a logical "0" or a logical "1" in a binary data processing system. The integrity and accuracy of the data (or instructions) stored in the computer memory, any calculations or data processing based thereon, and even the ability of the computer to operate as intended, are all directly related to the capability of the semiconductor device to maintain its designated state for the desired period of time with no change.
Radiation has an adverse effect on semiconductor devices and integrated circuits, and can seriously degrade performance, including the ability to maintain the designated state for the desired period of time. The radiation may occur naturally following the emission of cosmic rays or as a result of the natural radioactive decay of uranium or thorium or other high alpha energy emitters, or as the result of a nuclear event. When the radiation strikes a sensitive area of a semiconductor device, such as a p-n junction or the drain on the side of a SRAM cell holding a low voltage, it may induce a current flow or a voltage differential sufficient to cause the device to improperly change state. Such unintended changes of state are referred to as single event upset errors or soft errors.
This problem is exacerbated because the errors can appear as an intended signal or change of state of individual transistors within the memory cell without causing any damage or otherwise reflecting that the change was unintended. Thus, the state of the memory cell is erroneously changed, and upon testing the device will appear to be free form defects, so that the cause of the error will most likely go undiscovered. Moreover, the sensitivity of semiconductor devices to radiation increases as integrated circuit dimensions decrease and device density increases because more of the environmental radiation sources are capable of delivering charge amounts exceeding those representing information.
In the past, various techniques have been developed to enhance the immunity of a SRAM to unwanted changes in state induced by ionizing radiation. This has included innerting a resistor or resistor-capacitor network between the stages of the memory cell. However, this necessitates an increase in the write cycle time, which degrades the performance of the memory, and unduly increases the elements comprising the memory cell and the processing steps needed during fabrication, which increases device size, cost and complexity while reducing device yields and manufacturing efficiencies.
Thus, it is an object of the present invention to provide a memory cell having a high immunity to ionizing radiation by reducing the sensitivity of a semiconductor device to single event upset errors arising from incident radiation, such as stray ions, cosmic radiation, radioactive decay, or other alpha energy emissions.
It is another object of the present invention to provide a memory cell having a high immunity to ionizing radiation without degrading write-cycle times or increasing processing steps.
It is a further object of the present invention to provide a memory cell which is radiation-hardened and which maintains favorable write cycle times over the temperature range from -55.degree. to +125.degree. C.
These and other objects are accomplished by generally providing a static random access memory cell with a diode in series with the gates of the cross-coupled inverter pair which comprises the SRAM cell. In CMOS SRAM cells with relatively small feature size, single event upset errors result from ion interactions with the two transistor drains of the cell holding a low voltage. The diode of the present invention presents a high impedance between these low voltage drains and the opposite gate to isolate them and prevent a change of state to a high voltage. On the other hand, a low impedance is presented between the corresponding components holding a high voltage. Thus, the diode passes forward currents when a change of state is desired and blocks currents resulting from a radiation ion hitting a sensitive low voltage gate, to effectively protect against the harmful and undesired change of state.
More specifically, the radiation hardened SRAM cell of the present invention comprises first and second inverter stages, with each of the stages including a conduction path and a control path. The conduction path of each inverter stage includes a data node and the control path of each inverter stage is electrically connected to the data node of the other inverter stage. Means for controlling the current flow between each data node and the conduction path pass substantially only forward currents between the control path and the data node susceptible to single event destabilizations to prevent reverse currents changing the state of the data node.